Massive rounds for AI, EDA, and manufacturing; 80 startups raise $8.4B.

Advances in GPU computing and multi-beam mask writing are removing constraints to enable entirely curvilinear masks.

From shoes to GPUs; super agents; TSMC, ASML results; new chiplets and test facilities; Stanford AI index; photonics deals; ...

Panel-level packaging is arriving not because the engineering is ready, but because wafer-level economics are breaking down.

A new technical paper, “Exploring Silent Data Corruption as a Reliability Challenge in LLM Training,” was published by ...

Die-to-die chiplet standards are only the beginning. Many more standards are necessary for a chiplet marketplace. A number of such standards have either had initial versions released or are in ...

Large systems companies are pressing EDA vendors for performance improvements to keep pace with their AI workflows. The ...

There is no doubt that the semiconductor industry is in an era of rapid and profound transformation, driven by an increasing ...

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Achieving energy-efficient AI systems will require pre-competitive, industry-wide collaboration on foundational capabilities.

Metrology is proving to be a major challenge for those foundries working on processes for gate-all-around FETs at 3nm and beyond. Metrology is the art of measuring and characterizing structures in ...

Wafer probe, one of the key processes for ensuring reliability in semiconductor manufacturing, is becoming increasingly unreliable in multi-die assemblies and at leading-edge nodes. For much of the ...